SK Group Chairman Says Abnormal Memory Prices Should Fall; <span style='color:red'>AI</span> Chip Demand Seen Up 60–100% Next Year
  The recent surge in memory prices has drawn comments from SK Group Chairman Chey Tae-won, who also chairs SK hynix, one of the biggest beneficiaries of the boom. According to ETNews, Chey, who also serves as chairman of the Korea Chamber of Commerce and Industry (KCCI), said current memory prices are abnormally high and warned that if prices remain elevated, PC and mobile device prices will continue to rise, with those higher costs ultimately weighing on consumer demand.  As noted by Maeil Business Newspaper, Chey said demand for AI semiconductors is expected to increase by 60% to 100% in 2027 from 2026, while the broader memory semiconductor market is also projected to grow by at least 50% to 60% over the same period. However, he noted that few companies are meaningfully expanding supply, meaning the supply-demand gap is likely to widen further. This suggests that while the AI investment boom is driving memory prices higher, it could ultimately place greater pressure on downstream industries.  He argued that rising prices are not a healthy sign for the market, adding that prices should fall because current levels are abnormal. He also warned that PC and mobile manufacturers cannot continue passing higher memory costs on to consumers. This suggests that while the AI investment boom is driving memory prices higher, it could ultimately place greater pressure on downstream industries.  Chey also argued that memory companies should not restrict supply to keep prices elevated. As noted by Maeil Business Newspaper, he said limiting production to maintain high prices is not a sustainable strategy, adding that expanding supply to grow the overall market—even at the expense of slightly lower margins—would generate greater long-term benefits. He further warned that persistently high prices could attract new competitors and prompt governments to intervene.  However, Chey acknowledged that expanding supply will not be easy. According to Maeil Business Newspaper, increasing production of advanced AI memory requires significant investment and time to build manufacturing capacity, while shortages of equipment and skilled personnel remain key constraints. Although the industry is working to maximize output, he said demand is growing much faster, raising concerns that memory prices may continue to rise rather than fall. As ETNews notes, Chey said the top priority is to expand memory production capacity wherever possible, including in Yongin, the Honam region, and the U.S.  Chey’s comments align with SK hynix CEO Kwak Noh-jung’s assessment of the industry’s supply-demand outlook. According to Reuters, Kwak said the global memory industry is heading for its worst-ever supply shortage in 2027, with memory demand expected to outpace production capacity well into the next decade despite aggressive capacity expansion.  Chey on AI Infrastructure and Long-Term Growth  Beyond the memory market, Chey also predicted that even if the current supply shortage is partially eased, AI-related bottlenecks will shift to other parts of the infrastructure stack. According to ETNews, Chey said electrical equipment for energy infrastructure is already in short supply, and as AI adoption accelerates, shortages could eventually extend to power cables and even the raw materials needed to manufacture data center cables.  Looking further ahead, Chey said the ongoing wave of AI infrastructure investment is expected to eventually lower the cost of generating AI tokens, as noted by ETNews. Once the industry enters a token economy in which AI is converted into productivity for real-world work and services, he believes a self-sustaining AI ecosystem will emerge.
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Release time:2026-07-21 10:29 reading:147 Continue reading>>
CXMT IPO Could Raise Up to RMB 66.6B; How Founder Zhu Yiming Built China’s DRAM Challenger
  China’s leading memory maker CXMT is set to list on Shanghai’s STAR Market, drawing widespread market attention. The company has set its IPO price at RMB 8.66 per share and is scheduled to begin its online and offline share subscription on July 16. The company plans to issue 6.688 billion shares, representing approximately 10% of its enlarged share capital after the offering, with an over-allotment option included. According to TechNews, the market expects the IPO to raise up to RMB 66.6 billion, roughly double earlier estimates, potentially making it Asia’s largest IPO of the year.  Beyond the sheer scale of the IPO, the company’s founder, Zhu Yiming, has also drawn attention. After founding GigaDevice 20 years ago and taking the company public in Hong Kong this January, Zhu has now found success with his second startup.  From Silicon Valley to GigaDevice  Born in Yancheng, Jiangsu, Zhu Yiming studied physics at Tsinghua University before pursuing electronic engineering at the State University of New York at Stony Brook. He later worked at iPolicy Networks and Monolithic System Technologies, gaining end-to-end experience in memory chip design and development.  While working in Silicon Valley, Zhu saw the global memory industry shift from the U.S. to Japan and South Korea, inspiring him to build a homegrown Chinese memory company. As the report highlights, he founded GigaDevice, which developed China’s first high-speed mobile memory chip and became a leading NOR Flash supplier before listing in Shanghai in 2016 and Hong Kong in January 2026.  Building CXMT  Also in 2016, Zhu partnered with the Hefei municipal government to invest approximately RMB 18 billion in a 12-inch wafer fab, establishing CXMT. In 2018, Zhu stepped down as GigaDevice’s general manager to lead CXMT as CEO, pledging not to take a salary until the company became profitable, the report notes. Despite CXMT accumulating more than RMB 36.6 billion in losses by the end of 2025, he kept that promise for eight years. In 2019, CXMT announced the volume production of its 8Gb DDR4 chip, China’s first domestically developed DRAM chip to reach mass production.  A Long-Awaited Turnaround  As memory demand continued to surge, CXMT turned profitable in the first quarter of 2026. Revenue reached RMB 50.8 billion, up 719% year over year, while net profit rose 1,688% to RMB 24.76 billion. The company expects first-half 2026 revenue to reach RMB 110–120 billion, with net profit projected at RMB 50–57 billion. CXMT has also become the world’s fourth-largest DRAM supplier by market share, trailing only Samsung, SK hynix, and Micron.  Zhu has reportedly pledged to distribute half of his post-listing stake in CXMT—worth an estimated RMB 20 billion—to employees, saying he wants the team to share in the company’s success. Meanwhile, the IPO is expected to provide CXMT with additional capital for advanced process, capacity expansion, and next-generation DRAM development, further strengthening its global competitiveness.
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Release time:2026-07-17 10:54 reading:252 Continue reading>>
ASML Raises 2026 Guidance for Second Time This Year; Taiwan Sales Share Climbs to 30%
  Ahead of TSMC’s earnings call tomorrow, Dutch lithography giant ASML has reinforced optimism over the AI-driven semiconductor upcycle by raising its 2026 outlook for the second time this year, as highlighted by CNBC.  The company now expects annual sales of €43 billion ($49 billion) to €45 billion, with gross margins of 54% to 56%, according to its press release. Reuters adds that this would represent a 16% increase at the midpoint compared with ASML’s previous guidance of €36 billion to €40 billion.  For the quarter ended June 30, ASML reported revenue of €9.33 billion ($10.90 billion), exceeding analysts’ consensus estimate of €8.80 billion, Reuters notes, adding that its net income also came in ahead of expectations at €2.92 billion, versus the €2.62 billion forecast compiled by LSEG.  Taiwan’s Growing Role in ASML’s Sales Mix  The strong results were underpinned by robust AI-related demand and accelerating investments in advanced-node capacity. During the earnings call, ASML CEO Christophe Fouquet said customers are rapidly expanding capacity for 5nm, 4nm and 3nm technologies while pushing the 2nm ramp as aggressively as possible, according to an earnings call transcript from Yahoo! Finance.  As customers speed up capacity expansion and begin planning for the 1.4nm era as well, ASML expects its advanced logic foundry business to deliver around 25% revenue growth this year, Fouquet noted.  The trend was also reflected in ASML’s second-quarter regional sales mix. Taiwan accounted for 30% of revenue during the quarter, up from 23% in 1Q26, according to the company’s earnings presentation, suggesting continued investment by TSMC as it expands capacity.  South Korea nevertheless remained ASML’s largest market, contributing 43% of second-quarter sales, although its share edged down from 45% in the previous quarter.  China’s contribution also fell five percentage points to 14%. Despite the decline, management reiterated that China is still expected to account for around 20% of total net sales, according to the Yahoo Finance earnings call transcript.  EUV, DUV Expansion Accelerates  Meanwhile, ASML, per Reuters, also gave a more detailed outlook on its own expansion plan, noting that it is set to increase capacity for both its leading-edge EUV lithography systems and DUV tools by 30% in each of the next two years, as demand remains strong across advanced chips, mature nodes and the China market.  In 2026, ASML expects to ship around 65 Low-NA EUV systems, putting its EUV business on track for roughly 45% growth, according to the Yahoo! Finance earnings call transcript. The company has also regained momentum in DUV immersion production, with shipments expected to reach around 130 systems this year, roughly matching last year’s level.  Notably, ASML reached a significant milestone in High-NA EUV adoption, with Intel deploying the next-generation lithography system to produce part of its flagship Panther Lake laptop processors using the 18A process, according to its press release.
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Release time:2026-07-16 16:00 reading:239 Continue reading>>
Samsung Reportedly Completes Tesla <span style='color:red'>AI</span>5 Tape-out, Paving the Way for 2nm Ramp at Taylor Fab
  Samsung’s 2nm ramp at its Taylor fab may be moving closer to reality. According to Yonhap News, a Samsung Foundry official recently shared on LinkedIn that Tesla’s AI5 chip has completed tape-out and is expected to enter production afterwards on Samsung’s 2nm process at the Texas facility.  As highlighted by Yonhap News, the disclosure marks the first time Samsung Foundry’s production timeline for the Tesla AI5 chip has been revealed in concrete terms.  Notably, Samsung is not expected to be the sole foundry partner for Tesla’s next-generation AI chips. Yonhap News adds that Tesla will split AI5 production between Samsung and TSMC, while Samsung will reportedly take full responsibility for AI6 and TSMC will handle AI6.5.  Meanwhile, Samsung is already mass-producing Tesla’s existing AI4 chip on its 7nm process at the Pyeongtaek foundry line, with the upgraded AI4 version also expected to be produced at the same campus, according to Yonhap News.  Taylor Fab Becomes Key to Samsung’s Foundry Recovery  The positive development, as noted by The Guru, also signals that preparations for Samsung’s Taylor fab are accelerating. Samsung began moving key front-end and back-end semiconductor equipment into the facility in late April and has deployed core engineers from its South Korean headquarters to secure initial yields, the report adds.  As previously reported by The Elec, Samsung has reaffirmed that the Texas fab will begin ramp production in 2027. Beyond standard 2nm, industry observers cited by the report also expect Samsung to introduce its SF2P+ (second-generation enhanced 2nm process) at the facility, further strengthening its advanced-node capabilities.  A successful 2nm ramp at Taylor could provide fresh momentum for Samsung Foundry’s long-awaited recovery after years of losses, ET News reports. With its mid- to long-term order backlog nearing KRW 50 trillion, Samsung is also expanding its foundry customer base beyond Tesla, securing partnerships with major tech companies including Meta and Anthropic, the report adds.
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Release time:2026-07-14 15:24 reading:313 Continue reading>>
Samsung Reportedly Developing 4nm G<span style='color:red'>AI</span>A <span style='color:red'>AI</span> PC Chip; Mass Production Targeted as Early as 2027
  Samsung is reportedly preparing to enter the AI PC chip market. According to Hankyung, industry sources say Samsung Electronics’ System LSI Business under the Device Solutions (DS) Division is developing GAIA, a 4nm AI accelerator for AI PCs. Prototype chips have reportedly already been provided to major customers, including Lenovo and HP, for performance validation, with mass production targeted as early as 2027.  Samsung plans to pair GAIA with processing-in-memory (PIM), a next-generation DRAM technology that performs computations directly within memory, as the report indicates. Unlike traditional PC processors, GAIA is designed specifically for AI workloads, with an optimized NPU architecture aimed at efficiently handling generative AI tasks.  The reported move follows Samsung’s earlier attempt to enter the PC chip market 14 years ago with an Exynos application processor that powered Samsung Chromebooks in 2012. However, it failed to break Intel’s dominance and withdrew from the business roughly two years later.  AI PC Chip Competition Intensifies  Samsung’s reported move positions it alongside a growing number of companies targeting the AI PC market. The report says the segment remains in its early stages and has yet to produce a dominant player as the AI agent era begins to emerge. Companies including NVIDIA, Qualcomm, Intel, and Huawei are already competing in the space. NVIDIA unveiled its next-generation RTX Spark AI PC chip in May, while Qualcomm first introduced the Snapdragon X Elite in 2023 before expanding its lineup with the entry-level Snapdragon C.  EBN News says Samsung Electronics aims to differentiate itself by leveraging its leadership in memory alongside the AI chip design expertise gained from developing smartphone APs and mobile NPUs. Industry observers believe that combining AI accelerators with processing-in-memory (PIM) technology could enhance both AI processing performance and power efficiency.  Industry observers cited by Hankyung say the success of Samsung’s AI PC chip initiative will depend largely on its ability to secure major customers and bring the product to market. If the company achieves mass production and builds a stable supply chain, the business could emerge as a key growth driver, helping the System LSI Business address its long-standing structural losses.  Despite the growth opportunity, Samsung’s expansion into the AI accelerator market may also present strategic challenges. Hankyung notes that companies including NVIDIA and Qualcomm, which Samsung is expected to compete against in the AI PC market, are also among Samsung Foundry’s key customers.
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Release time:2026-07-13 13:53 reading:307 Continue reading>>
SK Group Chairman Joins ADR Listing Event; Samsung Reportedly Seeks Big Tech Foundry Orders at Sun Valley
  SK Group Chairman Chey Tae-won is attending SK hynix’s American Depositary Receipt (ADR) listing ceremony on Nasdaq in New York on the morning of July 10 local time. According to ETNews, in addition to meeting with global investors, Chey is expected to hold discussions with major customers on expanding AI memory cooperation. The report also says he may meet with executives from leading tech companies, including NVIDIA and Tesla, during his U.S. visit.  As the report notes, Chey’s attendance at the event is seen as an effort to showcase SK hynix’s AI memory competitiveness and long-term growth potential to global investors. The report adds that the ADR listing was intended to help the company achieve a valuation in global capital markets that better reflects its role as a key enabler of AI infrastructure expansion.  The ADR offering is valued at approximately KRW 43 trillion and involves the issuance of up to 17.79 million new shares, representing about 2.5% of the company’s total outstanding shares. The report says the proceeds will be used to finance construction of the first fab at the Yongin semiconductor cluster, the Cheongju P&T7 advanced packaging fab, and the purchase of manufacturing equipment, including extreme ultraviolet (EUV) scanners.  Samsung Courts Big Tech at Sun Valley  Samsung executives are also in the U.S., where Samsung Electronics Chairman Jay Y. Lee has attended the Sun Valley Conference alongside Han Jin-man, President and Head of the Foundry Business. According to ZDNet, the move reflects Samsung’s push to secure AI semiconductor orders from major technology companies. Lee is accompanied this year by Han Jin-man, who was appointed head of Samsung’s foundry business late last year. The report says Han is expected to support discussions on securing foundry orders from major tech companies during the conference.  Against this backdrop, attention has turned to potential foundry customers. According to The Korea Herald, one of the most closely watched meetings is with Apple executives, including CEO Tim Cook, incoming CEO John Turnus, and Senior Vice President of Services Eddy Cue. The report says Samsung Foundry, which secured an order for iPhone image sensor chips last August, is aiming to join Apple’s application processor (AP) supply chain, currently served by TSMC.  Beyond Apple, The Korea Herald also notes that Amazon CEO Andy Jassy and OpenAI CEO Sam Altman are attending the conference. Both companies are developing in-house AI chips to compete with NVIDIA, already source High Bandwidth Memory (HBM) from Samsung Electronics, and are viewed as potential Samsung Foundry customers.
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Release time:2026-07-10 10:56 reading:310 Continue reading>>
Huawei Expands Tau Scaling Law V2 Paper, Highlighting LogicFolding Path to Ascend <span style='color:red'>AI</span> Chips in 2030
  Two months after Huawei introduced the Tau (τ) Scaling Law in May, the company on July 3 disclosed additional details on an updated version, including further implementation insights and performance-related data. Notably, the V2 version of Time Scaling Theory for Multi-Level Electronic Systems (Tau Law) also outlines a roadmap extending LogicFolding beyond mobile SoCs into AI accelerators, including Huawei’s Ascend 990 expected around 2030.  Kirin 2026 Delivers Density Gain  In the near term, Kirin 2026 serves as the first validation platform for the dual-layer LogicFolding architecture. Chinese media outlets Guacha and mrjjxw.com, citing the paper published on ChinaXiv platform under the Chinese Academy of Sciences, report that compared with the 2025 Kirin 9030 Pro baseline, the Kirin 2026 achieves a transistor density increase from 155 MTr/mm² to 238 MTr/mm², representing a gain of approximately 53.5%.  The paper, cited by Guacha, also notes that achieving a similar gain through conventional geometric scaling would typically require about three years. As reported by Stdaily, Huawei’s first smartphone powered by the Kirin 2026 processor is expected to debut this fall, marking the first real-world test of the technology in the market.  According to Huawei, LogicFolding is a methodology that partitions digital, analog, and memory circuits across vertically stacked active tiers. On a mobile SoC, LogicFolding delivers a 55% stepwise increase in transistor density and a 41% reduction in power consumption at equivalent performance at a fixed device node, the company notes.  (Credit: Huawei)  Guacha further cites the V2 version of Time Scaling Theory for Multi-Level Electronic Systems (Tau Law), which projects logic folding will evolve from localized critical-path optimization to full multi-layer architectures over the next decade, with each package integrating three or more active layers.  The shift, according to the report, is driven by low-temperature hybrid bonding, which relaxes inter-layer thermal constraints, and TSV landing point migration from upper metals to M6, freeing over 30% of routing resources. Under this trajectory, transistor density is projected to scale toward 400 MTr/mm² and beyond between 2026 and 2035, the report suggests.  Next Phase: LogicFolding in Ascend AI Chips  Notably, the V2 version of Time Scaling Theory for Multi-Level Electronic Systems identifies Huawei’s Ascend AI chips as the next application of LogicFolding. According to Guacha, while the technology could enable Kirin processors to boost CPU clock speeds toward 4GHz and beyond, it is also expected to extend to the Ascend 990 AI accelerator around 2030. The report further notes that 3D folding is expected to become the primary carrier of the α architecture through 2035.  According to Huawei, in AI system designs, a co-designed stack—combining memory-semantic Unified Bus fabric, near-package Hi-ONE optical I/O, and edge-to-surface 3D folding—is projected to deliver more than 100× growth in hardware integration by 2035.
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Release time:2026-07-07 11:18 reading:410 Continue reading>>
ASE Reportedly Raises Advanced Packaging Quotes by More Than 20% in Latest <span style='color:red'>AI</span>-Driven Price Hike
  AI-driven semiconductor demand is reportedly fueling another round of price increases across the OSAT industry. According to MoneyDJ, citing industry sources, ASE, the world’s leading outsourced semiconductor assembly and test (OSAT) provider, has raised its packaging quotes by more than 20%, driven by higher raw material costs and higher long-term investment costs.  The latest price increases cover advanced packaging technologies such as Chip-on-Wafer-on-Substrate (CoWoS) and Fan-Out Chip on Substrate (FoCoS), with major U.S. customers among those affected, the report says.  ASE declined to comment on the market speculation, the report adds.  The report indicates that ASE has become a key beneficiary of the AI-driven advanced packaging boom. With TSMC’s CoWoS capacity still supply-constrained and outsourcing continuing to increase, the company is seeing stronger demand for its on-substrate (oS) packaging and chip probing (CP) services.  Meanwhile, utilization rates across the OSAT industry remain near full capacity, with both leading and smaller providers actively expanding capacity to meet rising demand, the report notes.  AI Fuels OSAT Investment and Capacity Expansion  Commenting on the pricing strategy, ASE COO Tien Wu said the increases reflect two key factors: higher raw material costs and growing capital investment requirements, according to MoneyDJ.  Those long-term investments are being fueled by AI. According to Liberty Times, Wu said AI has become the key driver behind ASE’s capacity expansion plans. As AI adoption extends beyond data centers into physical AI applications such as automotive electronics and humanoid robots, he described the trend as a long-term structural shift and said the ASE Group is “going all out” to expand capacity.  To support future demand, Wu estimates that ASE and its subsidiary SPIL have around 15 new factory projects underway this year to prepare for demand expected from 2029 to 2030 and beyond, according to Liberty Times. ASE increased capital expenditures to US$5.3 billion in 2025 and further raised its 2026 capex to US$8.5 billion, with additional increases remaining possible.  The aggressive capacity expansion reflects a broader industry trend. As noted by Economic Daily News, competition in AI has expanded beyond leading-edge processes, making backend packaging, testing, and assembly increasingly critical to chip performance, yields, and time-to-market. As a result, major OSAT providers are accelerating investments in technologies such as 2.5D/3D packaging, chiplets, HBM integration, and panel-level packaging, further positioning the sector as a key capacity bottleneck in the AI semiconductor supply chain.
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Release time:2026-07-02 15:57 reading:376 Continue reading>>
Samsung Unveils UFS 5.0 Storage, Claims Industry’s Fastest with 10.8GB/s Speeds
  While advancing its next-generation HBM development, Samsung is also pushing forward on the NAND front, unveiling what it claims is the industry’s first and fastest Universal Flash Storage (UFS) 5.0 solution. According to Samsung, the device delivers sequential read speeds of up to 10.8 GB/s and write speeds of up to 9.5 GB/s, more than doubling the performance of the previous UFS 4.1 standard.  Building on this performance leap, Samsung said mass production is scheduled to begin in the fourth quarter of this year, with capacities of up to 1TB. As noted by Chosun Biz, the solution is based on JEDEC’s latest embedded storage standard, UFS 5.0, and is built on the company’s ninth-generation V-NAND technology.  According to its press release, Samsung’s UFS 5.0 is designed to enable more seamless and efficient AI experiences on next-generation mobile devices, ranging from flagship smartphones to XR headsets and AI wearables. The improved performance is expected to reduce latency and accelerate response times when running large language models (LLMs) in on-device AI applications.  UFS 5.0 Key Specs in Focus  Generative AI is rapidly migrating from cloud environments to on-device deployment, driving a sharp increase in the volume of data required for local processing. As a result, storage is shifting from a passive data repository into a core infrastructure layer that directly supports AI computation.  Against this backdrop, Samsung’s new storage solution delivers sequential read speeds of up to 10.8 GB/s and sequential write speeds of up to 9.5 GB/s, more than doubling the performance of the previous UFS 4.1 standard. On the other hand, the product’s power efficiency, according to the press release, has also been improved by over 40% compared with Samsung’s UFS 4.1 solution, driven by a range of architectural enhancements including clock gating and multi-voltage design technologies.  The device also features a more compact design. According to Samsung, the UFS 5.0 solution comes in an ultra-compact package measuring just 7.5mm × 13mm × 0.9mm, making it 16.7% smaller than its predecessor. The reduced form factor enhances design flexibility and improves internal space efficiency across a wide range of applications, including smartphones, wearables, and extended reality (XR) devices.
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Release time:2026-06-25 10:40 reading:528 Continue reading>>
Apple A22 Pro May Adopt 1.4nm in 2028; TSMC Remains Primary Supplier, Intel Reportedly Considered
  Apple is expected to use TSMC’s 2nm for its A20 and A20 Pro chips, but industry discussions are already shifting to the A22 Pro and a potential move to 1.4nm. According to Bloomberg, Apple is expected to adopt a 1.4nm process for the A22 Pro, which is slated for high-end iPhone models in 2028. While TSMC is expected to remain Apple’s primary manufacturing partner, the report notes that the company is also evaluating Intel as a potential secondary production source.  Based on the reported timeline, the A21 Pro is expected to remain on TSMC’s 2nm, potentially transitioning to the enhanced N2P variant, which offers incremental improvements over N2, according to Wccftech.  Wccftech also notes that costs could rise significantly, with TSMC’s 1.4nm wafers estimated to cost around US$45,000 each. As a result, the report suggests that only the A22 Pro, rather than the standard A22, will be manufactured on the 1.4nm node.  As noted by MacRumors, current rumors suggest Intel could manufacture lower-end chips for products such as the iPad and Mac. At the same time, Intel CEO Lip-Bu Tan is seeking to revive the company’s foundry business by focusing on leading-edge nodes. According to TechPowerUp, Intel expects its 14A node to enter risk production in 2028, followed by high-volume manufacturing in 2029.  Beyond the possibility of Apple adopting TSMC’s 1.4nm node for its A22 chips, the company is reportedly preparing three major product launches for late 2027. According to 9to5Mac, citing Bloomberg, these include a 20th-anniversary iPhone featuring a nearly edge-to-edge display and curved glass that wraps around the sides, a second-generation foldable iPhone, and AirPods equipped with built-in cameras.  TSMC’s A14 Roadmap Takes Shape  TSMC has been accelerating construction of its 1.4nm fab at the Central Taiwan Science Park. According to Economic Daily News, foundation piling for the first phase has largely been completed, with progress reportedly ahead of schedule. Trial production could begin as early as 3Q27, with mass production targeted for the second half of 2028.  Compared with N2, A14 is expected to deliver a 10–15% performance improvement at the same power level, or reduce power consumption by 25–30% at the same performance level, while increasing logic density by more than 20%, according to TSMC.
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Release time:2026-06-18 10:15 reading:715 Continue reading>>

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