SK hynix Reportedly Pulls Forward HBM4E Sample Timeline, Eyeing June–July Shipments to Key Customers
  Samsung announced the start of HBM4E sampling in late May and later unveiled an HBM5 mock-up for the first time at COMPUTEX 2026. Against this backdrop, rival SK hynix is also stepping up its next-generation HBM push, with South Korean media outlet Newsis reporting that the memory giant has secured positive results in HBM4E development and is nearing sample shipments to key customers.  Notably, certain analysts cited by the report expect SK hynix to begin HBM4E sample shipments as early as this month, or by July at the latest. The company had previously guided that sampling would start in the second half of the year, suggesting the timeline is now being pulled forward, the report adds.  As Newsis notes, next-generation HBM is highly customized for customers, and earlier sample shipments enable faster performance validation and optimization—ultimately translating into a strategic edge in securing final mass production orders.  Beyond sampling timelines, broader supply and pricing dynamics are also shifting, which may give early movers key advantages. According to TrendForce, as the market enters 2Q26, negotiations between buyers and suppliers have shifted toward HBM4 supply agreements for 2027, which is expected to become the market’s mainstream project generation. The shift underscores how both Samsung and SK hynix are accelerating HBM4 and HBM4E development amid tightening market cycles.  SK hynix HBM4E Specs Under Spotlight  As highlighted by Newsis, SK hynix’s HBM4E is likely to be used in NVIDIA’s next-generation AI accelerator, Rubin Ultra, set for release next year. In line with this platform upgrade, TrendForce notes that NVIDIA’s Rubin Ultra is expected to further increase HBM capacity per GPU to 384GB.  Against this backdrop of rising system-level requirements, HBM4E specifications are also being pushed higher across the stack. According to Newsis, SK hynix’s HBM4E core die is expected to adopt a 1c DRAM process node, compared with the 1b node used in HBM4. In addition, The Chosun Daily previously reported that the company is likely to use TSMC’s 3nm process for its HBM4E logic die, aiming to challenge Samsung’s 4nm design.  On the competitive front, Samsung Electronics completed the world’s first shipment of HBM4E samples in late May, supplying them to NVIDIA, according to Yonhap News.  Samsung’s HBM4E combines a 1c DRAM core die with a 4nm foundry-based base die, delivering speeds of up to 14Gbps per pin and peaking at 16Gbps, equivalent to a maximum bandwidth of 4TB/s, the report notes.
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Release time:2026-06-16 10:43 reading:377 Continue reading>>
Lenovo Reportedly Set for July Price Hikes Across Product Portfolio as Memory Costs Pressure PC Market
  With memory prices remaining elevated, consumer electronics could be heading for another round of price increases. Chinese media outlet Lanjinger.com, citing sources familiar with the matter, reports that Lenovo plans to raise prices across its product lineup from July, broadly in line with the previous round of increases, after the 618 shopping festival ends.  Notably, Lanjinger.com highlights this would not be Lenovo’s first price hike this year, pointing to March when the PC maker issued nationwide price adjustment notices and raised retail prices for some models by over RMB 1,000. The report adds it has already urged distributors to lock in inventory and secure current pricing ahead of the upcoming increase, with a formal notice expected to be issued by the end of June.  The pricing pressure is spreading across the PC industry. Dell, as highlighted by the report, has already raised prices on certain products as well, with server prices increasing 20%–40%. Prices for desktops, notebooks, and workstations are also expected to see further significant hikes by July, the report suggests.  A separate report from Sina also suggests the sharp rise in costs has put pressure on the entire PC industry, prompting several major vendors to begin raising prices as early as six months ago. Dell, according to Sina, increased prices across its commercial PC portfolio in late 2025, with hikes ranging from 10% to 30%.  Memory Price Surge Drives PC Cost Pressure  Surging memory prices have become a key driver behind rising costs for PC brands. Lanjinger.com, citing TrendForce data, reports that cumulative spot price increases for DRAM and NAND flash have exceeded 300%. By May 2026, the average price of PC-grade DDR4 8Gb memory had climbed to US$20, the highest level since TrendForce began tracking the market, according to the report.  Against this backdrop, Taipei Times, citing TrendForce’s latest forecast, reports that global notebook shipments are now expected to decline 13% YoY in 2026, as soaring memory prices and tight CPU supply weigh on demand in the second half—marking a sharper downturn than the 9.4% drop projected in January.
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Release time:2026-06-11 10:33 reading:495 Continue reading>>
Apple May Debut M5 Ultra-Powered Mac Studio at WWDC, Boosting Demand for TSMC N3P and SoIC-mH
  Apple’s annual Worldwide Developers Conference (WWDC) is set to kick off on June 9. According to Commercial Times, beyond updates to Apple Intelligence, Siri, and macOS 27, market attention is focused on whether a next-generation Mac Studio powered by Apple’s M5 Ultra chip will also make an appearance.  The M5 Ultra is expected to retain Apple’s UltraFusion dual-die architecture, combining two M5 Max dies and delivering interconnect bandwidth of more than 1,000GB/s. Specifications are rumored to include a 36-core CPU, an 84-core GPU, and up to 512GB of unified memory, the report adds.  Notably, as the report highlights, TSMC’s N3P is expected to serve as the key manufacturing foundation for the M5 Ultra, potentially adding to demand for already tight 3nm capacity.  TSMC’s SoIC-mH Emerges as Potential M5 Ultra Enabler  TSMC’s advanced packaging is also expected to play a key role in boosting the performance of the M5 Ultra. According to institutional investors cited by Commercial Times, SoIC-mH could emerge as a core technology platform if Apple adopts a higher-density heterogeneous integration approach alongside its UltraFusion high-speed interconnect architecture.  As TechNews notes, SoIC-mH uses a molded horizontal packaging architecture and integrates multiple chips directly at the wafer level through no-bump hybrid bonding technology. The approach can increase packaging density, improve signal transmission efficiency, and enhance thermal performance.  In addition, TechPowerUp notes that TSMC’s SoIC-mH allows Apple to separate the CPU and NPU from the GPU. This enables Apple to scale CPU clusters and GPU dies independently, adding more cores as needed. The approach also gives Apple greater flexibility to expand its product lineup without pushing die sizes close to the 830 mm² reticle limit. According to the report, this can improve yields and reduce defects associated with larger silicon dies.  Despite these potential advantages, the launch timing of the next-generation Mac Studio remains uncertain. According to Macworld, citing Bloomberg, supply-chain constraints are affecting production of Apple’s next-generation professional Macs and could delay the debut of the M5 Ultra-powered system until October 2026.  Touchscreen MacBooks Could Create New Opportunities for TSMC  Meanwhile, macOS 27 is another key focus of this year’s WWDC. Commercial Times notes that Apple is expected to strengthen touch support features, laying the groundwork for future touchscreen MacBooks through the early adoption of on-cell touch panel integration.  Institutional investors cited by the report say that the shift toward OLED displays and touch-enabled MacBooks is expected to drive demand for upgraded display driver ICs, TDDI chips, and touch controllers, while also benefiting TSMC’s specialty process. The report adds that TSMC has completed reliability certification for its 16nm high-voltage process platform and is set to enter the yield-validation stage in 2026, potentially helping customers develop more competitive OLED display driver ICs.
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Release time:2026-06-09 13:50 reading:462 Continue reading>>
ROHM Launches an Ultra-Compact Wireless Power Chipset for Wearables
  ROHM has developed a wireless power supply IC chipset consisting of the receiver - ML7670 - and transmitter - ML7671 - compatible with Near Field Communication (NFC) technology for compact wearables such as smart rings and smart bands as well as peripheral devices like smart pens.  The smart ring market has seen rapid growth in recent years, primarily in healthcare and fitness applications. However, for extremely small ring-shaped devices worn on the finger, wired charging is impractical, while conventional Qi wireless charging standard is difficult to implement due to constraints such as coil size. This has driven increased demand for a proximity-based power transfer method capable of reliably charging ultra-compact devices.  In response, NFC-based charging, which operates at the high-frequency 13.56MHz band that enables antenna miniaturization, is attracting increased attention, with adoption accelerating in next-generation wearables. Following the successful commercialization of the 1W ML7660/ML7661, ROHM has developed the ML7670/ML7671 chipset optimized for even smaller devices.  This new chipset builds on the proven receiver - ML7660 - and transmitter - ML7661. The maximum power transfer is specified at 250mW, while peripheral components such as the switching MOSFETs required to supply power to the charging IC are built in. The result is a solution optimized for both mounting area and power transfer efficiency in the power class demanded by compact wearable devices, especially smart rings.  The ML7670 power receiver IC achieves a maximum power transfer efficiency of 45% in the 250mW low output range – all in an industry-leading form factor of just 2.28 × 2.56 × 0.48mm. A key feature of the new chipset is superior performance that surpasses the efficiency of comparable products in the same class by optimizing elements such as coil matching, rectifier circuitry, and reduced losses in switching devices.  What's more, all firmware required for wireless power delivery is embedded directly within the IC, eliminating the need for a host MCU. This significantly reduces board space along with development workload in device design.  Compliance with NFC Forum (WLC 2.0) enables power transfer while maintaining compatibility with existing devices, positioning the chipset as a core element in the expanding NFC wireless power ecosystem.  The new chipset is already in mass production. Furthermore, it has been adopted in SOXAI RING 2, the latest model launched on December 10th, 2025, by SOXAI, Inc. (“SOXAI” is pronounced “SOK-sai”.), the Japanese developer and distributor of the original sleep monitoring ring SOXAI RING. Evaluation boards and reference designs are also offered to facilitate integration. For more information, please contact a sales representative or submit an inquiry via the contact page on ROHM’s website.  Going forward, ROHM will continue to promote device development that leverages miniaturization and low-power consumption technologies essential for wearable devices, contributing to improved user convenience and the continued growth of the wearable market.  Specifications  Case Study: SOXAI RING 2 Adoption Example SOXAI RING is the only smart ring for sleep management developed in Japan capable of accurately capturing and analyzing sleep data. It incorporates cutting-edge technologies such as an optical vital sensor, temperature sensor, accelerometer, Bluetooth® Low Energy communication, and NFC wireless charging functionality.  The latest model, SOXAI RING 2, is equipped with Deep Sensing™, a proprietary photoplethysmography (PPG) sensor that significantly improves measurement accuracy, enabling the visualization of physical health changes with far greater depth and precision.  Bluetooth® is a registered trademark of Bluetooth SIG, Inc. in the US.  Deep Sensing™ is a trademark or registered trademark of SOXAI, Inc.
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Release time:2026-04-29 10:03 reading:592 Continue reading>>
MicroLED Gains Focus as Seoul Semiconductor Plans $180M AR Investment, Aledia Reports Breakthrough
  Amid mounting margin pressure and slowing growth in the LED industry, players are moving beyond traditional segments in search of new momentum, with MicroLED emerging as a key focus. According to MicroLED-info, Seoul Semiconductor plans to invest KRW 250 billion (around $180 million) over the next five years, primarily in the R&D and production of microLED microdisplay modules for AR applications.  The report suggests that the company has embarked on a government-approved restructuring plan as its core LED package business faces mounting pressure from falling prices and weakening profitability. Under the initiative, the new displays will be built on Seoul Semiconductor’s proprietary WICOP (Wafer Integrated Chip on PCB) technology, the report adds.  As noted by Maeil Ilbo, founded in 1992, Seoul Semiconductor supplies LED packages across lighting, automotive, and IT, and holds about a 4.8% global share in the optoelectronics market. Despite its proprietary wire-free WICOP technology, the company has come under pressure from persistent price declines and softer demand, weighing on margins, the report explains.  French MicroLED Startup Achieves Key Milestone  On the other hand, French startup Aledia, according to MicroLED-info, has successfully demonstrated a fully functional monolithic RGB epitaxial wafer, marking a key milestone for the technology. The achievement validates the company’s end-to-end monolithic RGB process, enabling red, green, and blue emission from a single epi wafer fabricated in a single run, the report notes.  According to the company, its proprietary nanowire-based architecture can grow nanowires in a single processing step, with diameters ranging from 100 nm to 400 nm depending on the target wavelength, enabling full RGB capability within one unified structure.  On device performance, the company demonstrated a 2.5 μm sub-pixel pitch—equivalent to a 5.0 μm × 5.0 μm pixel size—and outlined a roadmap to further shrink this to 2.0 μm for both monochrome and monolithic RGB displays, MicroLED-info suggests.  In parallel, Aledia has validated its 9V microLED devices on 200 mm silicon wafers, including 15×30 μm blue emitters on the same platform. The company also confirmed the commercial availability of its 3D-Nano microLED technology built on 200 mm silicon in February, the report adds.
Release time:2026-04-27 10:39 reading:751 Continue reading>>
NOVOSENSE Launches Next-Generation Isolated CAN Transceiver NSI1150, Supporting ±70V Bus Fault Protection and Higher Data Rates
  NOVOSENSE today announced the launch of its new industrial-grade isolated CAN transceiver, the NSI1150 series. Built on NOVOSENSE's third-generation isolation technology, the device delivers ±70V bus fault protection and up to ±150kV/μs (typical) common-mode transient immunity (CMTI). Compared to the previous generation (NSI1050), the NSI1150 achieves a comprehensive improvement in reliability and noise immunity. It also integrates NOVOSENSE's proprietary CAN FD transceiver, supporting communication speeds of up to 5 Mbps.  The NSI1150 is available in multiple package options, including SOW16, SOW8, SOP8, SOWW8, and DUB8, addressing diverse design requirements. It is well suited for high-voltage, high-noise, multi-node applications such as industrial automation and control, energy and power systems, as well as communications and servers.  Reliability Upgrade for Harsh Environments  The NSI1150 delivers industry-leading reliability and robustness, featuring a high CMTI of ±150kV/μs (typical) and ±70V bus fault protection, enabling it to effectively handle strong electromagnetic interference and ground potential differences in demanding environments.  In addition, all pins support ±6kV HBM ESD protection and 10kV surge capability across the isolation barrier, ensuring stable communication even under extreme conditions. The device offers multiple isolation ratings—3 kVRMS, 5 kVRMS, and 7.5 kVRMS—to meet stringent safety requirements across various applications, reinforcing system protection in critical sectors such as industrial automation and energy infrastructure.  Multiple Package Options for Flexible Design  The NSI1150 is offered in five mainstream package options—SOW16, SOW8, SOP8, SOWW8, and DUB8—accommodating different space constraints and safety requirements. Among them, the newly introduced SOWW8 wide-body package provides up to 15 mm creepage distance, making it ideal for applications with strict creepage requirements, such as photovoltaic systems, EV charging stations, and industrial power supplies.  This extended creepage distance simplifies safety certification processes and enables more flexible layout design for high power density systems. The diversified package portfolio further enhances design flexibility and accelerates time-to-market.  "Isolation+" Portfolio Setting Industry Benchmark  Leveraging its deep expertise and technological leadership in isolation, NOVOSENSE offers a comprehensive "Isolation+" portfolio, including digital isolators, isolated sensing, isolated interfaces, isolated power, and isolated drivers.  NOVOSENSE is building a robust safety foundation for high-voltage systems with its full "Isolation+" ecosystem:  "+" stands for enhanced safety: NOVOSENSE products deliver safety levels exceeding basic isolation standards, and build a more reliable system isolation safety boundary for customers' systems.  "+" stands for full product ecosystem: With mature capacitive isolation technology IP as the cornerstone, expand into a complete product portfolio to provide one-stop isolation solutions.  "+" stands for in-depth application empowerment: Meet the emerging needs of scenarios including electric vehicle high-voltage platforms, high-power photovoltaic-storage-charging systems, and high-integration, high-efficiency AI server power supplies, enabling system-level safety, reliability and efficiency.  With its comprehensive "Isolation+" product strategy—anchored by core technology IP and a full ecosystem—NOVOSENSE continues to set the benchmark in isolation semiconductors, delivering one-stop isolation solutions to customers worldwide.  Previous:
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Release time:2026-04-24 10:58 reading:979 Continue reading>>
ROHM has Introduced Reference Designs for Three-Phase Inverters Featuring New SiC Power Modules
  ROHM has released reference designs "REF68005", "REF68006", and "REF68004" for three-phase inverter circuits featuring EcoSiC™ brand SiC molded modules "HSDIP20", "DOT-247", and "TRCDRIVE pack™" on ROHM’s website. Designers can use the data provided in these reference designs to create the drive circuit boards. When combined with ROHM's SiC modules, these designs help reduce the person-hours required for device evaluation.  In high power conversion circuits, while SiC power devices contribute to higher efficiency and reliability, they can increase the workload associated with peripheral circuit and thermal design. The reference designs released by ROHM support output power levels up to the 300kW class, facilitating the adoption of SiC modules across a wide range of automotive and industrial applications.  Three types of SiC modules compatible with these reference designs are already available for purchase through online distributors such as DigiKey and Farnell.  About Reference Designs  These reference designs are intended for users to utilize the publicly released design data. If you would like to obtain a reference design board or evaluation kit, please contact a sales representative or visit the contact page on ROHM’s website. (Quantities are limited.)  Regarding Online Sales of SiC ModulesDetails of SiC modules currently available through online distributors can be found below.  New SiC Molded Modules Now Available for Online Purchase!  Simulation SupportWe also provide various support resources to facilitate quick evaluation and implementation of our products. ROHM’s comprehensive solutions, including simulation and thermal design support, can provide valuable assistance in component selection.  Various design data related to the evaluation boards can be downloaded from their respective reference design page, while the product information for SiC modules compatible with the reference designs can be accessed from each product page as well.  Additionally, the ROHM Solution Simulator, a simulation tool enabling system-level verification from the component selection stage, is available on ROHM’s website.  HSDIP20: Reference Design / ROHM Solution Simulator / LTspice® Circuit ModelDOT-247: Reference Design / ROHM Solution Simulator / LTspice® Circuit ModelTRCDRIVE pack™: Reference Design  Other Reference DesignsIn addition to those introduced in this release, we offer numerous reference designs that contribute to reduced design effort for users. More details are available through the link below.  Reference Design / Application Evaluation Kit  Related InformationNews Release (HSDIP20)  ROHM Develops New High Power Density SiC Power ModulesNews Release (DOT-247)  ROHM Launches 2-in-1 SiC Molded Module “DOT-247”News Release (TRCDRIVE pack™)  ROHM’s New TRCDRIVE pack™ with 2-in-1 SiC Molded Module: Significantly Reduces the Size of xEV Inverters  EcoSiC™ BrandEcoSiC™ is a brand of devices that utilize silicon carbide (SiC), which is attracting attention in the power device field for performance that surpasses silicon (Si). ROHM independently develops technologies essential for the evolution of SiC, from wafer fabrication and production processes to packaging, and quality control methods. At the same time, we have established an integrated production system throughout the manufacturing process, solidifying our position as a leading SiC supplier.・TRCDRIVE pack™ and EcoSiC™ are trademarks or registered trademarks of ROHM Co., Ltd.・LTspice® is a registered trademark of Analog Devices, Inc.When using third-party trademarks, please adhere to the usage guidelines specified by the rights holder.
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Release time:2026-03-18 11:35 reading:812 Continue reading>>
Renesas Develops SoC Technologies for Automotive Multi-Domain ECUs Essential for the SDV Era
  Renesas Electronics Corporation (TSE:6723), a premier supplier of advanced semiconductor solutions, has developed three System-on-Chip (SoC) technologies for automotive multi-domain electronic control units (ECUs). They feature advanced AI processing capabilities and chiplet functions, serving as the core technology platform for next-generation automotive electrical/electronic (E/E) architectures. Renesas presented the results at the International Solid-State Circuits Conference 2026 (ISSCC 2026), held February 15–19 in San Francisco, USA.  In the age of software-defined vehicles (SDVs), automotive SoCs require advanced performance to run multiple applications simultaneously and must offer scalability through chiplets. They must also meet the functional safety requirements of automotive SoCs. As multi-domain SoCs powering central computing are growing larger and more complex, maintaining automotive-grade quality is becoming more difficult. With increased performance in advanced SoCs, power consumption also rises, making improvements in power efficiency and safety vital. To meet these needs, Renesas has developed the following new technologies.  1. Chiplet architecture that supports functional safety  To meet the functional safety requirements of automotive SoCs, Renesas has developed a new, proprietary architecture that supports ASIL D even in a chiplet configuration. By combining the standard die-to-die UCIe interface with a proprietary RegionID mechanism, the architecture prevents interference with hardware resources, even when numerous applications run simultaneously, thereby achieving Freedom from Interference (FFI).  Conventional UCIe interfaces lack functionality to transmit RegionIDs between dies. Renesas developed a method for mapping RegionIDs into physical address space, encoding them into the UCIe region, and transmitting them. This enables safe access control through the memory management unit (MMU) and real-time cores, and meets functional safety requirements across chiplets. Additionally, by maintaining bandwidth from processors to the memory bus, the UCIe interface was confirmed through testing to achieve a high transmission speed of 51.2 GB/s, approaching the upper limit of intra-SoC transfer speeds. This technology provides both scalability and safety for high-performance automotive SoCs.  2. Advanced AI processing capabilities and automotive-grade quality  Automotive-grade quality is vital for SDV systems. Renesas has created a 3 nm SoC design that improves the performance of neural processing units (NPUs) for AI processing, while maintaining automotive-grade quality. In recent years, NPUs have been growing larger, with their area expanding 1.5-fold compared to previous generations. This has led to increased clock latency between shared clock sources and individual circuits. To address this problem, Renesas has redesigned the clock architecture by splitting up clock pulse generators (CPGs), which in past designs were module-level units, and placing mini-CPGs (mCPGs) at the sub-module level. This greatly reduces clock latency and meets timing requirements.  However, multi-layer mCPGs complicate test clock synchronization, which is critical for achieving zero defects in automotive applications. Renesas has integrated test circuits into the hierarchical CPG architecture and unified the signal path for user clocks and test clocks. The new design also synchronizes upper- and lower-level mCPGs under a single clock source in test mode. This makes unified phase adjustment possible. As a result, Renesas has been able to achieve quality aligned with zero-defect expectations, even for large-scale SoCs, providing the high reliability required for next-generation SDV automotive SoCs.  3. Advanced power control and monitoring for improved power efficiency and safety  To achieve the high level of performance required for automotive SoCs with improved power efficiency and safety, Renesas has developed advanced power gating technology that uses over 90 power domains. It enables precise power control, from several milliwatts to several tens of watts, depending on operating conditions. Furthermore, Renesas has split power switches (PSWs) into ring PSWs and row PSWs to reduce IR drops (voltage drops) associated with increasing current density from smaller process geometries. When power is turned on, the ring PSW suppresses rush currents. Then the row PSW equalizes impedance within the domain. Together, these reduce IR drops by roughly 13% compared with conventional designs.  To meet ASIL D functional safety standards, the dual core lock step (DCLS) configuration controls the master and checker cores with independent power switches and controllers. With this design, even if one side fails, the failure can be detected through lockstep operation. Furthermore, loopback monitoring is performed for each PSW's gate signal, so OFF states are detected when a failure occurs. A digital voltage meter (DVMON), which is highly resistant to temperature drift, is used for voltage monitoring. This improves aging tolerance by 1.4 mV. These technologies enable high-performance automotive SoCs that offer both power efficiency and safety.  These new technologies are being used in Renesas' R-Car X5H SoC for automotive multi-domain ECUs. With R-Car X5H, users can accelerate the evolution of SDVs while ensuring safety and enabling autonomous driving, digital cockpit and more.  About Renesas Electronics Corporation  Renesas Electronics Corporation (TSE: 6723) empowers a safer, smarter and more sustainable future where technology helps make our lives easier. A leading global provider of microcontrollers, Renesas combines our expertise in embedded processing, analog, power and connectivity to deliver complete semiconductor solutions. These Winning Combinations accelerate time to market for automotive, industrial, infrastructure and IoT applications, enabling billions of connected, intelligent devices that enhance the way people work and live. Learn more at renesas.com. Follow us on LinkedIn, Facebook, X, YouTube, and Instagram.  (Remarks) All names of products or services mentioned in this press release are trademarks or registered trademarks of their respective owners.
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Release time:2026-02-28 15:45 reading:1398 Continue reading>>
Fullhan launches FH8626V300: 2M/3M IP Camera SoC
MQ771-GL: Fibocom’s Compact Cat.M Module Enters Sampling, Driving Asset Tracking Innovation
  Fibocom (300638.SZ | 0638.HK), a global leader in wireless communicationmodules and AI solutions, announced that its Cat.Mmodule MQ771-GL has entered the engineering sample stage. Withits ultra-compact size, low power consumption,global frequency coverage, and stable network compatibility,the MQ771-GL offers a cost-effective IoT solution for asset tracking, enablinglong battery life, high reliability, and precise positioning for large-scaleLPWA deployments.  Dual-Mode Support for FlexibleDeployment  The MQ771-GL supports 3GPP Release 14Cat.M1 and NB-IoT standards and is compatible with mainstream frequencybands worldwide, making it ideal for LPWA network deployments across NorthAmerica, Europe, Asia, and beyond. This global compatibility ensuresreliable connectivity for asset tracking devices and enables flexible operationeven in complex or challenging environments.  Compact Size with Ultra-Low Power Consumption  Leveraging advanced power managementtechnologies, the MQ771-GL supports PSM (Power Saving Mode) and eDRX (extendedDiscontinuous Reception), dramatically extending device battery life. InPSM mode, standby current drops to the microampere (μA) level, cutting powerconsumption by 75% compared with the previous generation — ideal for smartwater meters. In eDRX mode, power usage is reduced by 90%, making itsuitable for gas meters, asset trackers, and other long-term outdoor devices,enabling multi-year operation.  The module’s 17.7mm × 15.8mm LGA package is compatible with the pin layout of Fibocom’s Cat.1 modules, supportingflexible product iteration. Its compact form factor is well-suited forspace-constrained tracking devices, simplifying integration and deployment.  Enhanced Performance with Rich InterfaceOptions  The MQ771-GLsupports MQTT, CoAP, LwM2M and standard interfaces like UART, I2C,and I2S, making it adaptable for diverse asset tracking terminals. Itintegrates Soft GPS for precise real-time positioning and features a hardware-levelsecurity engine for encrypted, secure communications, protecting againstunauthorized access.  Liu Sunzhi,General Manager of Fibocom’s MTC Business Unit, commented:  "With the MQ771-GL now entering the engineering sample stage, itsultra-compact, ultra-low-power design is set to lower development barriers forasset tracking terminals and accelerate large-scale IoT connectivity. Movingforward, we will continue to strengthen collaborative innovation with verticalindustries, driving the rapid commercialization of low-power, wide-connectivitysolutions for asset tracking and other IoT applications."
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Release time:2026-02-06 17:41 reading:1171 Continue reading>>

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