SMIC Founder Says China May Gain Edge in Niche Chips as 80% of Demand Lies Outside Advanced Nodes
  As China pushes to strengthen its chip industry, Richard Chang, founder of SMIC, China’s largest foundry, suggests that success in semiconductors is not solely about winning the 2nm or 3nm race, with niche markets potentially emerging as a key competitive advantage for China. According to STAR Market Daily, Chang said that niche markets have become a key breakthrough point for China’s semiconductor industry, adding that advancing in specialized market segments could help strengthen the country’s overall chip capabilities.  SMIC remains limited to the 7nm node due to its reliance on older DUV lithography equipment. However, Richard Chang’s emphasis on niche markets suggests that the company’s mature-node technologies could still find meaningful opportunities across a range of applications, as noted by Wccftech.  SMIC Founder Highlights Opportunity Beyond Advanced Nodes  As noted by STAR Market Daily, Richard Chang argued that semiconductor success should not be defined solely by achieving 3nm or 2nm nodes, describing such thinking as a misconception and highlighting niche markets as a key opportunity for China’s chip industry.  Chang further noted that advanced nodes account for less than 20% of the global semiconductor market by product volume, while more than 80% of demand comes from mature-node and specialty-process segments. According to Chang, many niche markets still dominated by overseas players could represent key breakthrough opportunities for Chinese semiconductor companies.  The trend may already be emerging across parts of the supply chain. According to TrendForce, with Taiwanese foundries shifting capacity and raising prices, customers in HV processes and CIS applications are increasingly turning to Chinese foundries for more stable pricing and capacity availability. This order migration has been evident since the second half of 2025, driving strong demand for 90 nm-and-above 12-inch wafers among Chinese players.  Beyond Large Models: Richard Chang Highlights Edge AI Potential  In addition, Richard Chang argued that edge AI and scenario-driven applications remain underappreciated opportunities within the broader AI landscape. As STAR Market Daily notes, Chang said sectors such as industrial control, automotive electronics, and wearable devices could create strong demand for application-specific semiconductor solutions, offering startups room to pursue differentiated strategies outside direct competition with global AI giants.
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Release time:2026-05-12 10:24 reading:172 Continue reading>>
ARM CEO Says Agentic AI May Drive CPU Core Counts to 512 as GPU-CPU Ratios Become Less Relevant
  The rise of agentic AI is fueling fresh debate over the future GPU-to-CPU balance in AI systems, with Arm CEO Rene Haas now weighing in on the discussion. According to a transcript published by Investing.com, Haas said that while CPUs may not outnumber GPUs on a chip basis, they could from a core-count perspective.  Haas noted that overall CPU demand is likely to increase significantly as agentic AI scales, with data centers potentially requiring more than four times today’s CPU capacity. He said this could create a data center CPU market opportunity exceeding US$100 billion by 2030.  At the same time, Haas emphasized that the industry is seeing not only an explosion in overall CPU demand, but also rapid growth in the number of cores per CPU. According to Haas, many agentic AI workloads involve independent jobs, flows, or batches running on dedicated CPU cores, increasing the need for higher-core-count processors.  Haas used Blackwell, Rubin, and other large AI accelerators as examples, noting that these chips are already approaching reticle limits, meaning their size is constrained by the maximum area a lithography mask can print. In contrast, he said CPU core counts could still double or even quadruple over the coming years.  Haas noted that the Arm AGI CPU already features 136 cores, significantly higher than many competing offerings. Looking ahead, he said the industry is likely to move toward 256-core and even 512-core CPU designs. He added that such high-core-count architectures play to Arm’s strengths, as efficiency per core becomes increasingly critical at larger scales.  Mydrivers notes that AMD and Intel are moving in a similar direction. AMD’s 2nm Zen 6-based EPYC processors are already expected to reach up to 256 cores with SMT multithreading support, while Intel’s all-E-core Xeon processors have reached 288 cores, with the next generation expected to scale to as many as 512 cores.  Regarding the Arm AGI CPU launched at the company’s Arm Everywhere event last quarter, Haas said customer response has been “very strong.” He added that customer demand across fiscal 2027 and fiscal 2028 has already exceeded US$2 billion, more than double the level projected at launch.
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Release time:2026-05-11 13:48 reading:199 Continue reading>>
Apple Reportedly Keeps 2nm 5G Modem Orders with TSMC Amid Intel Cooperation Signals
  While recent market chatter has focused on a potential shift by Apple between longtime foundry partner TSMC and Intel, the Economic Daily News, citing industry sources, reports that the Cupertino-based company remains heavily dependent on the Taiwanese foundry giant, as it plans to place its entire in-house 5G modem orders with TSMC, leveraging its 2nm process technology.  The report suggests that Apple’s self-developed 5G modem chips are expected to power future iPhone, iPad, and Apple Watch devices, replacing modems from Qualcomm. The volume used across its product lineup is projected to reach hundreds of millions of units, the report adds.  Notably, Apple’s iPhone 17 lineup is expected to be the last to ship with Qualcomm Incorporated’s 5G modems, as the company moves toward a full transition to its in-house C2 baseband chip across all iPhone 18 models, according to Wccftech.  The C2 development builds on Apple’s earlier in-house modem effort. Apple’s C1, first introduced in early 2025 with the iPhone 16e, marked its most complex chip system to date, integrating a 4nm baseband modem and a 7nm transceiver, according to earlier reporting from Reuters. The Economic Daily News further reports that Apple Inc.’s in-house C2 5G modem is expected to add full mmWave support—addressing the Sub-6 GHz limitation of its predecessor—while also incorporating satellite connectivity.  Supply chain sources cited in the Economic Daily News report say TSMC has already secured foundry orders for Apple’s modem chips. Its back-end testing partner is also reportedly preparing for higher demand, with around 600 test systems being procured, as capacity is set to ramp from 2027.  Apple’s Chip Tug-of-War: TSMC vs Intel  Though claims of an Apple order shift to Intel remain unconfirmed, and any such move would not signal a departure from TSMC, cooperation between Apple and Intel appears to be warming. According to The Wall Street Journal, the two companies have reportedly reached a preliminary agreement for Intel to manufacture some of the chips powering Apple devices.  The two sides have been engaged in intensive talks for more than a year, with a formal deal said to have been hammered out in recent months, the report adds.  In parallel, Commercial Times reported earlier that Apple is evaluating Intel’s 18A-P process for its M-series chips. Looking further ahead, The New 7 reports that the first Intel-manufactured low-end M-series chips could emerge as early as mid-2027 under contract production, likely targeting entry-level Macs or iPads.  As highlighted by The Wall Street Journal, Apple’s reported outreach to Intel may reflect growing supply chain pressures, as the Cupertino firm—long TSMC’s top customer—faces tightening access to advanced manufacturing capacity amid surging demand from NVIDIA and other AI chip designers.  Intel previously played a central role in powering Apple’s Mac lineup, before Apple transitioned in 2020 to its own Arm-based custom chips, the report points out.
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Release time:2026-05-11 11:12 reading:218 Continue reading>>
TSMC, Sony to Form JV for Image Sensors, Including New Production Lines for AI and Automotive Use
  As TSMC has decided to upgrade its 2nd Kumamoto fab to 3nm, the foundry giant is also exploring to secure more opportunities for its mature nodes in Japan. According to its press release on May 8, Sony and TSMC announced the signing of a non-binding memorandum of understanding (MOU) to establish a strategic partnership focused on the development and manufacturing of next-generation image sensors.  Notably, under the proposed framework, the two companies plan to form a joint venture (JV), with Sony serving as the majority and controlling shareholder. The JV is expected to build development and production lines at Sony’s newly constructed fab in Koshi City, Kumamoto Prefecture.  TSMC said that beyond manufacturing expansion, the partnership is also aimed at exploring emerging opportunities in physical AI applications, including automotive and robotics.  Through this collaboration, Sony will contribute its deep expertise in image sensor design, while TSMC will bring its advanced process technology and large-scale manufacturing capabilities. Both sides aim to combine their respective strengths to further enhance the performance and competitiveness of future image sensor technologies.  The move aligns with an April Reuters report, which noted that Japan’s Ministry of Economy, Trade and Industry (METI) has confirmed that the Japanese government will provide subsidies of up to ¥60 billion (approximately US$380 million) to Sony Semiconductor Solutions Corporation for the construction of an image sensor facility in Kumamoto Prefecture, western Japan.  Sony is a long-time customer of TSMC. As previously reported by Commercial Times, TSMC’s first Kumamoto fab—entering mass production in late 2024—supplies logic chips to Sony and DENSO, using 22/28nm and 12/16nm process technologies.  Separately, Sony has recently begun restructuring efforts, including a spin-off of its television business. Its CIS (image sensor) unit is also facing rising competitive pressure, as Samsung Electronics continues to expand its share in supplying image sensors for Apple, prompting Sony to seek new growth momentum in the segment, Commercial Times added.
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Release time:2026-05-09 10:16 reading:241 Continue reading>>
TSMC Hints at Potential Further U.S. Expansion; Industry Sources Reportedly See Up to US$250B Investment
  As TSMC continues expanding its U.S. footprint, comments from Cliff Hou, TSMC Senior Vice President and Deputy Co-COO, have caught industry attention. According to Commercial Times, Hou said at the 2026 SelectUSA Investment Summit that the company “is prepared for growth from any new business opportunities,” remarks the market has interpreted as signaling potential further expansion of TSMC’s U.S. investments. TSMC’s total U.S. investment currently stands at US$165 billion.  Commercial Times notes that supply chain developments show chip equipment suppliers have also begun establishing U.S. subsidiaries to support TSMC. Industry sources added that TSMC’s total U.S. investment could reach as much as US$250 billion, with the company expected to replicate the Hsinchu Science Park cluster model in Phoenix.  Meanwhile, Economic Daily News reported that TSMC’s first Arizona fab entered mass production in 4Q24, while its second fab has already been completed and is expected to begin 3nm mass production in the second half of 2027. TSMC previously said construction of its third Arizona fab is already underway, while permits are being sought for a fourth fab and its first advanced packaging facility in the state. The report also noted that TSMC has acquired a second large parcel of land near its existing Arizona site to support future expansion plans.  Although TSMC’s U.S. fabs are more costly, capacity remains in strong demand, with previous reports indicating that customers had already reserved capacity at all four Arizona fabs, as noted by Economic Daily News. Institutional investors said that, for process technologies below 2nm, TSMC’s related capacity ratio between Taiwan and the U.S. is expected to reach roughly 7:3 by 2030.  TSMC Reshapes Board Amid Global Expansion  In addition, TSMC has also recently adjusted its board structure. According to Commercial Times, the company plans to revise its corporate charter by increasing the number of board seats from the current seven to ten directors to nine to twelve, with the proposal set to be discussed at the shareholders’ meeting on June 4.  The move reflects TSMC’s response to the rapidly changing global business environment and is intended to provide greater flexibility in recruiting directors from diverse professional backgrounds, the report said. It also noted that, as TSMC rapidly expands overseas and continues increasing its U.S. investments, the board will need more members with expertise in international supply chains, geopolitics, and U.S. policy.
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Release time:2026-05-07 13:22 reading:264 Continue reading>>
Apple Reportedly Eyes Samsung, Intel U.S. Foundry for Core Chips Amid TSMC Constraints, Supply Diversification
  Apple is reportedly weighing the possibility of having some of its core device chips manufactured by Samsung and Intel. According to Bloomberg, citing sources, the company has held preliminary discussions on using the two as alternative production partners for its main processors—potentially providing a second sourcing option alongside its longstanding supplier, TSMC.  Sources say the company has held early-stage discussions with Intel about leveraging its foundry services, while Apple executives have also visited a Samsung facility under construction in Texas that is expected to produce advanced chips.  That said, the report notes that neither effort has led to any orders so far. Engagements with both suppliers remain at a preliminary stage, as Apple continues to have reservations about adopting non-TSMC manufacturing technologies.  One of the key drivers behind Apple’s potential shift is supply constraints at TSMC, according to Bloomberg. As the report notes, Apple executives addressed the issue during the company’s quarterly earnings call last week, indicating that limited chip availability for iPhone and Mac devices is currently weighing on growth.  In early 2026, Tim Cook identified access to advanced-node manufacturing as the main bottleneck for Apple’s iPhone output, according to CNBC. He noted that production is constrained by limited capacity for the company’s A-series and M-series system-on-chip (SoC) chips, which are fabricated on TSMC’s 3nm process.  In addition, it also aims to maintain at least two suppliers for key components, allowing Apple to strengthen its negotiating leverage on pricing while reducing the risk of supply disruptions, Bloomberg adds.  Apple’s Reported Supplier Talks May Open Door for Intel Comeback, Samsung Gains  Apple’s talks with both companies reportedly began before the most recent supply constraints emerged. As Bloomberg notes, collaborating with Intel could offer an added advantage, potentially strengthening Apple’s ties with the Donald Trump administration. As for Samsung, the report indicates that it has already been working on supplying more peripheral components for Apple’s devices, including power management parts.  In an August 2025 press release, Apple also announced a partnership with Samsung to co-develop a new chip manufacturing technology at Samsung’s Austin fab. Citing industry sources, Business Korea adds that the chip Samsung is expected to produce will likely be used as an image sensor in future iPhones and other Apple products.  Separately, industry momentum appears to be building around Intel’s foundry push. According to Commercial Times, major tech firms including Google and Apple are weighing a shift to Intel’s foundry. The report adds that Apple’s M-series chips are evaluating Intel’s 18A-P node.  Apple’s potential shift could provide a boost to both Samsung and Intel. As the report notes, securing external customers for its foundry business is central to Intel’s turnaround strategy under CEO Lip-Bu Tan. Winning Apple as a client would mark a major milestone for Tan and could help draw in additional business. Samsung, meanwhile, would also stand to gain significantly from an endorsement by Apple.
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Release time:2026-05-06 14:44 reading:284 Continue reading>>
ROHM Launches an Ultra-Compact Wireless Power Chipset for Wearables
  ROHM has developed a wireless power supply IC chipset consisting of the receiver - ML7670 - and transmitter - ML7671 - compatible with Near Field Communication (NFC) technology for compact wearables such as smart rings and smart bands as well as peripheral devices like smart pens.  The smart ring market has seen rapid growth in recent years, primarily in healthcare and fitness applications. However, for extremely small ring-shaped devices worn on the finger, wired charging is impractical, while conventional Qi wireless charging standard is difficult to implement due to constraints such as coil size. This has driven increased demand for a proximity-based power transfer method capable of reliably charging ultra-compact devices.  In response, NFC-based charging, which operates at the high-frequency 13.56MHz band that enables antenna miniaturization, is attracting increased attention, with adoption accelerating in next-generation wearables. Following the successful commercialization of the 1W ML7660/ML7661, ROHM has developed the ML7670/ML7671 chipset optimized for even smaller devices.  This new chipset builds on the proven receiver - ML7660 - and transmitter - ML7661. The maximum power transfer is specified at 250mW, while peripheral components such as the switching MOSFETs required to supply power to the charging IC are built in. The result is a solution optimized for both mounting area and power transfer efficiency in the power class demanded by compact wearable devices, especially smart rings.  The ML7670 power receiver IC achieves a maximum power transfer efficiency of 45% in the 250mW low output range – all in an industry-leading form factor of just 2.28 × 2.56 × 0.48mm. A key feature of the new chipset is superior performance that surpasses the efficiency of comparable products in the same class by optimizing elements such as coil matching, rectifier circuitry, and reduced losses in switching devices.  What's more, all firmware required for wireless power delivery is embedded directly within the IC, eliminating the need for a host MCU. This significantly reduces board space along with development workload in device design.  Compliance with NFC Forum (WLC 2.0) enables power transfer while maintaining compatibility with existing devices, positioning the chipset as a core element in the expanding NFC wireless power ecosystem.  The new chipset is already in mass production. Furthermore, it has been adopted in SOXAI RING 2, the latest model launched on December 10th, 2025, by SOXAI, Inc. (“SOXAI” is pronounced “SOK-sai”.), the Japanese developer and distributor of the original sleep monitoring ring SOXAI RING. Evaluation boards and reference designs are also offered to facilitate integration. For more information, please contact a sales representative or submit an inquiry via the contact page on ROHM’s website.  Going forward, ROHM will continue to promote device development that leverages miniaturization and low-power consumption technologies essential for wearable devices, contributing to improved user convenience and the continued growth of the wearable market.  Specifications  Case Study: SOXAI RING 2 Adoption Example SOXAI RING is the only smart ring for sleep management developed in Japan capable of accurately capturing and analyzing sleep data. It incorporates cutting-edge technologies such as an optical vital sensor, temperature sensor, accelerometer, Bluetooth® Low Energy communication, and NFC wireless charging functionality.  The latest model, SOXAI RING 2, is equipped with Deep Sensing™, a proprietary photoplethysmography (PPG) sensor that significantly improves measurement accuracy, enabling the visualization of physical health changes with far greater depth and precision.  Bluetooth® is a registered trademark of Bluetooth SIG, Inc. in the US.  Deep Sensing™ is a trademark or registered trademark of SOXAI, Inc.
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Release time:2026-04-29 10:03 reading:326 Continue reading>>
MicroLED Gains Focus as Seoul Semiconductor Plans $180M AR Investment, Aledia Reports Breakthrough
  Amid mounting margin pressure and slowing growth in the LED industry, players are moving beyond traditional segments in search of new momentum, with MicroLED emerging as a key focus. According to MicroLED-info, Seoul Semiconductor plans to invest KRW 250 billion (around $180 million) over the next five years, primarily in the R&D and production of microLED microdisplay modules for AR applications.  The report suggests that the company has embarked on a government-approved restructuring plan as its core LED package business faces mounting pressure from falling prices and weakening profitability. Under the initiative, the new displays will be built on Seoul Semiconductor’s proprietary WICOP (Wafer Integrated Chip on PCB) technology, the report adds.  As noted by Maeil Ilbo, founded in 1992, Seoul Semiconductor supplies LED packages across lighting, automotive, and IT, and holds about a 4.8% global share in the optoelectronics market. Despite its proprietary wire-free WICOP technology, the company has come under pressure from persistent price declines and softer demand, weighing on margins, the report explains.  French MicroLED Startup Achieves Key Milestone  On the other hand, French startup Aledia, according to MicroLED-info, has successfully demonstrated a fully functional monolithic RGB epitaxial wafer, marking a key milestone for the technology. The achievement validates the company’s end-to-end monolithic RGB process, enabling red, green, and blue emission from a single epi wafer fabricated in a single run, the report notes.  According to the company, its proprietary nanowire-based architecture can grow nanowires in a single processing step, with diameters ranging from 100 nm to 400 nm depending on the target wavelength, enabling full RGB capability within one unified structure.  On device performance, the company demonstrated a 2.5 μm sub-pixel pitch—equivalent to a 5.0 μm × 5.0 μm pixel size—and outlined a roadmap to further shrink this to 2.0 μm for both monochrome and monolithic RGB displays, MicroLED-info suggests.  In parallel, Aledia has validated its 9V microLED devices on 200 mm silicon wafers, including 15×30 μm blue emitters on the same platform. The company also confirmed the commercial availability of its 3D-Nano microLED technology built on 200 mm silicon in February, the report adds.
Release time:2026-04-27 10:39 reading:357 Continue reading>>
New Thermal Management Breakthrough: GaN-on-Sapphire Substrate Thinned to 50μm
  Recently, China-based Ziener Tech has unveiled progress in sapphire substrate thinning, announcing that it has successfully reduced the substrate thickness of its 8-inch GaN-on-sapphire wafers to 50μm.  In practical applications, heat dissipation has long been a key bottleneck limiting GaN device performance. Substrate material plays a critical role in thermal management. Sapphire offers strong insulation, high thermal stability, and relatively good lattice and thermal matching with GaN, enabling simpler epitaxial structures. However, its inherently low thermal conductivity has historically constrained heat dissipation. Thinning the substrate effectively shortens the thermal conduction path, thereby improving overall device thermal performance.  The company’s advancement lies in precise control of the substrate thinning process. According to Ziener, as substrate thickness was gradually reduced from the conventional 200μm to 100μm and ultimately to 50μm, device thermal performance improved significantly. Test data show that at 200μm, the junction-to-case thermal resistance is 1.6°C/W, comparable to silicon-based GaN devices. At 100μm, thermal resistance drops to 1.1°C/W, outperforming silicon-based solutions. At 50μm, it further decreases to 0.8°C/W—about half that of comparable GaN-on-silicon devices.  Benefited from the improved thermal resistance, GaN-on-sapphire devices demonstrate clear thermal advantages over GaN-on-silicon counterparts in real-world applications. Under high-power conditions across various voltages and loads, Ziener’s devices consistently deliver lower temperature rise than competing silicon-based GaN devices, highlighting superior heat dissipation capability.  Further validation in application scenarios also quantifies the impact of substrate thickness on device temperature. In tests conducted on a high-power totem-pole PFC power board, Ziener compared devices with 100μm and 50μm substrates. Results show that at 90 V input, the case temperature of the 50μm device is reduced by 13.6°C compared to the 100μm version; at 264 V input, the reduction reaches 14.5°C. Across multiple voltage and load conditions, GaN-on-sapphire devices consistently deliver lower temperature rise than equivalent GaN-on-silicon devices.  Notably, Ziener also disclosed that it has completed technical development for an ultra-thin 30μm sapphire substrate, indicating further room for thermal performance improvement. For high power density and high-efficiency system applications, substrate thinning offers a viable pathway to overcoming thermal challenges in GaN devices.  Industry analysts note that as the power semiconductor market increasingly demands higher efficiency, reliability, and compact form factors, advancements in substrate technology—an upstream cornerstone—will directly shape downstream competitiveness. GaN-on-sapphire already holds advantages in breakdown voltage and reliability in medium- to high-voltage applications. Continued progress in thermal management is expected to expand its adoption across a broader range of high-power scenarios.
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Release time:2026-04-27 10:37 reading:357 Continue reading>>
NOVOSENSE Launches Next-Generation Isolated CAN Transceiver NSI1150, Supporting ±70V Bus Fault Protection and Higher Data Rates
  NOVOSENSE today announced the launch of its new industrial-grade isolated CAN transceiver, the NSI1150 series. Built on NOVOSENSE's third-generation isolation technology, the device delivers ±70V bus fault protection and up to ±150kV/μs (typical) common-mode transient immunity (CMTI). Compared to the previous generation (NSI1050), the NSI1150 achieves a comprehensive improvement in reliability and noise immunity. It also integrates NOVOSENSE's proprietary CAN FD transceiver, supporting communication speeds of up to 5 Mbps.  The NSI1150 is available in multiple package options, including SOW16, SOW8, SOP8, SOWW8, and DUB8, addressing diverse design requirements. It is well suited for high-voltage, high-noise, multi-node applications such as industrial automation and control, energy and power systems, as well as communications and servers.  Reliability Upgrade for Harsh Environments  The NSI1150 delivers industry-leading reliability and robustness, featuring a high CMTI of ±150kV/μs (typical) and ±70V bus fault protection, enabling it to effectively handle strong electromagnetic interference and ground potential differences in demanding environments.  In addition, all pins support ±6kV HBM ESD protection and 10kV surge capability across the isolation barrier, ensuring stable communication even under extreme conditions. The device offers multiple isolation ratings—3 kVRMS, 5 kVRMS, and 7.5 kVRMS—to meet stringent safety requirements across various applications, reinforcing system protection in critical sectors such as industrial automation and energy infrastructure.  Multiple Package Options for Flexible Design  The NSI1150 is offered in five mainstream package options—SOW16, SOW8, SOP8, SOWW8, and DUB8—accommodating different space constraints and safety requirements. Among them, the newly introduced SOWW8 wide-body package provides up to 15 mm creepage distance, making it ideal for applications with strict creepage requirements, such as photovoltaic systems, EV charging stations, and industrial power supplies.  This extended creepage distance simplifies safety certification processes and enables more flexible layout design for high power density systems. The diversified package portfolio further enhances design flexibility and accelerates time-to-market.  "Isolation+" Portfolio Setting Industry Benchmark  Leveraging its deep expertise and technological leadership in isolation, NOVOSENSE offers a comprehensive "Isolation+" portfolio, including digital isolators, isolated sensing, isolated interfaces, isolated power, and isolated drivers.  NOVOSENSE is building a robust safety foundation for high-voltage systems with its full "Isolation+" ecosystem:  "+" stands for enhanced safety: NOVOSENSE products deliver safety levels exceeding basic isolation standards, and build a more reliable system isolation safety boundary for customers' systems.  "+" stands for full product ecosystem: With mature capacitive isolation technology IP as the cornerstone, expand into a complete product portfolio to provide one-stop isolation solutions.  "+" stands for in-depth application empowerment: Meet the emerging needs of scenarios including electric vehicle high-voltage platforms, high-power photovoltaic-storage-charging systems, and high-integration, high-efficiency AI server power supplies, enabling system-level safety, reliability and efficiency.  With its comprehensive "Isolation+" product strategy—anchored by core technology IP and a full ecosystem—NOVOSENSE continues to set the benchmark in isolation semiconductors, delivering one-stop isolation solutions to customers worldwide.  Previous:
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Release time:2026-04-24 10:58 reading:374 Continue reading>>

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