AMD Unveils Next-Gen CPU Roadmap: Florence Targets 2028 with Rumored Sub-2nm Node, Ravenna in 2030

　　As NVIDIA expands its AI infrastructure roadmap with Rosa, a data center CPU designed for agentic AI workloads beyond Vera, AMD is stepping up its CPU roadmap as well. At Advancing AI 2026 on July 23, AMD revealed that its next-generation Zen 7-based EPYC server CPUs, codenamed “Florence,” are on track for 2028, followed by “Ravenna” in 2030.

　　A key highlight of Florence is its transition to a next-generation process. As noted by Phoronix, CEO Lisa Su confirmed that the EPYC “Florence” will be built on a next-generation node and feature ACE AI compute extensions. Wccftech suggests that the chip could bring AMD’s EPYC lineup into the sub-2nm era, potentially using technologies such as TSMC’s A16 or A14.

　　By comparison, NVIDIA’s Feynman GPU and Rosa CPU, also expected around 2028, are reportedly targeting TSMC’s A16 process, according to Commercial Times.

　　Ahead of Florence, AMD’s Venice CPU is being manufactured in Taiwan using TSMC’s 2nm process, with plans to later expand production to TSMC’s Arizona fab, Commercial Times reports.

　　Beyond the CPU itself, EPYC Florence will serve as the host processor for AMD’s next-generation AI rack-scale platform, codenamed “Ferrara.” The new EPYC family will also become AMD’s first to support next-generation memory standards, including MRDIMM and LPDDR, potentially paving the way for future DDR6 adoption, according to Wccftech.

　　Following Florence, AMD’s “Ravenna” CPUs, based on the Zen 8 architecture, are slated for 2030 as the company continues to push for greater share in the server CPU market.

　　Instinct GPU Roadmap Moves Forward

　　Beyond its CPU roadmap, AMD also outlined its next-generation Instinct GPU plans. The company said the Instinct MI500 series is set to launch in 2027, featuring upgraded compute, memory and interconnect technologies, followed by the MI600 series in 2028.

　　Wccftech explains that MI500 series is expected to introduce the CDNA 6 architecture, next-generation HBM4E memory, advanced GPU scale-up capabilities and a flexible design ready for both copper and optical interconnects. The lineup, according to the report, is positioned to take on NVIDIA’s Rubin Ultra GPUs, which are expected to power Kyber rack-scale systems.

　　Looking further ahead, AMD is developing its CDNA-Next architecture for the MI600 series, scheduled for 2028 and aimed at competing with NVIDIA’s next-generation Feynman accelerators, Wccftech adds.

　　Behind AMD’s next-generation GPU roadmap, memory supply will play a critical role. According to Digital Daily, Samsung currently supplies HBM4 for AMD’s MI455 Instinct GPUs and serves as the dedicated supplier of DDR5 solutions for the 6th-generation EPYC CPUs deployed in the Helios platform.