Toshiba and the Parable of Flash

Release time:2017-06-27
source:EE Times

Toshiba Corp.’s plan to spin off its chip business has put its flagship NAND flash memory products in the spotlight. Toshiba engineers invented flash memory in the 1980s, setting off a revolution that ultimately transformed many facets of consumer and industrial electronics. But Toshiba management, initially failing to foresee the bounty that awaited flash developers, came close to letting the big one get away.

By 1980, the need for a more economical data-storage alternative to E2PROM had become apparent to Fujio Masuoka, a factory manager at Toshiba. E2PROM incorporated two transistors per cell and had to be completely erased before being rewritten. So Masuoka assembled a team of four engineers to develop a smaller and more affordable memory chip architecture that could store a lot of data but would speed erase and write times.

Masuoka’s team came up with a design that replaced the E2PROM two-transistor cell structure with a single-transistor cell and allowed data to be read and written in blocks or pages. The design eventually led to the creation of much smaller memory chips. And Masuoka based his work on the premise that the cost of new memory chips would continue to drop as transistors shrank in size.

Masuoka’s quest for an E2PROM replacement led to a much bigger catch.

To help pitch their concept, Masuoka and his team worked to come up with a catchy name that would highlight the new memory technology’s ultrafast erasing capability. Team member Shōji Ariizumi suggested “flash,” evoking the speed of a camera flash.

What happened next is a story all too familiar in the tech world. Masuoka’s bosses at Toshiba didn’t like the idea and asked him to “erase” it. Nonetheless, Masuoka and his team presented their work at the 1984 IEEE International Electron Devices Meeting (IEDM) in San Francisco.

The making of NOR and NAND flash
Intel Corp., intrigued by Masuoka’s ideas for a new memory architecture, undertook its own work and launched the first NOR flash chip in 1988. The NOR flash chip allowed a single machine word or byte to be written or read independently.That lengthened the erase and write time over Toshiba’s early design but provided full address and data buses, thus allowing random access to any memory location. That, in turn, made NOR flash a suitable alternative to ROM chips for storing program code in devices like the set-top box.

That’s when Toshiba went back to the drawing board. A year after Intel launched its NOR flash, the Japanese tech giant came up with a version of its NAND flash chip design that reduced the erase and write times and mandated less area per cell.

Toshiba's early NAND flash chips quickly found traction as mass storage media in removable devices like memory cards.
Toshiba’s early NAND flash chips quickly found traction as mass storage media in removable devices like memory cards.

Toshiba’s early NAND flash chips quickly found traction as mass storage media in removable devices like memory cards.

Consequently, Toshiba’s NAND flash chips were able to offer greater storage density and lower cost per bit. And the mass data storage capability made NAND flash the memory technology of choice in devices such as solid-state drives (SSDs), memory cards, and music players.

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2018-08-21 00:00 reading:863
Toshiba Memory Corporation today announced that it has developed a prototype sample of 96-layer BiCS FLASH, its proprietary 3D flash memory, with 4-bit-per-cell (quad level cell, QLC) technology that boosts single-chip memory capacity to the highest level yet achieved.Toshiba Memory will start to deliver samples to SSD and SSD controller manufacturers for evaluation from the beginning of September, and expects to start mass production in 2019.The advantage of QLC technology is pushing the bit count for data per memory cell from three to four and significantly expanding capacity. The new product achieves the industry’s maximum capacity [1] of 1.33 terabits for a single chip which was jointly developed with Western Digital Corporation.This also realizes an unparalleled capacity of 2.66 terabytes with a 16-chip stacked architecture in one package. The huge volumes of data generated by mobile terminals and the like continue to increase with the spread of SNS and progress in IoT, and the need to analyze and utilize that data in real time is expected to increase dramatically. That will require even faster than HDD, larger capacity storage and QLC products using the 96-layer process will contribute a solution.A packaged prototype of the new device will be exhibited at the 2018 Flash Memory Summit in Santa Clara, California, USA from August 6th to 9th.Looking to the future, Toshiba Memory will continue to improve memory capacity and performance and to develop 3D flash memories that meet diverse market needs, including the fast expanding data center storage market.
2018-07-24 00:00 reading:830
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