A completely new kind of non-von-Neumann processor called a HIVE — Hierarchical Identify Verify Exploit — is being funded by the Defense Advanced Research Project Agency (DARPA) to the tune of $80 million over four-and-a-half years. Chipmakers Intel and Qualcomm are participating in the project, along with a national laboratory, a university and a defense contractor North Grumman.
Pacific Northwest National Laboratory (Richland, Washington) and Georgia Tech are involved in creating software tools for the processor while Northrup Grumman will build a Baltimore center that uncovers and transfers the Defense Departments graph analytic needs for the what is being called the world's first graph analytic processor (GAP).
"When we look at computer architectures today, they use the same [John] von Neumann architecture invented in the 1940s. CPUs and GPUs have gone parallel, but each core is still a von Neumann processor," Trung Tran, a program manager in DARPA’s Microsystems Technology Office (MTO), told EE Times in an exclusive interview.
"HIVE is not von Neumann because of the sparseness of its data and its ability to simultaneously perform different processes on different areas of memory simultaneously," Trung said. "This non-von-Neumann approach allows one big map that can be accessed by many processors at the same time, each using its own local scratch-pad memory while simultaneously performing scatter-and-gather operations across global memory."
Graph analytic processors do not exist today, but they theoretically differ from CPUs and GPUs in key ways. First of all, they are optimized for processing sparse graph primitives. Because the items they process are sparsely located in global memory, they also involve a new memory architecture that can access randomly placed memory locations at ultra-high speeds (up to terabytes per second).
Today's memory chips are optimized to access long sequential locations (to fill their caches) at their highest speeds, which are in the much slower gigabytes per second range. HIVEs, on the other hand, will access random eight-byte data points from global memory at its highest speed, then process them independently using their private scratch-pad memory. The architecture is also specified to be scalable to up to however many HIVE processors are needed to perform a specific graph algorithm.
"Of all the data collected today, only about 20 percent is useful — that's why its sparse —making our eight-byte granularity much more efficient for Big Data problems," said Tran.
Together, the new arithmetic-processing-unit (APU) optimized for graph analytics plus the new memory architecture chips are specified by DARPA to use 1,000-times less power than using today's supercomputers. The participants, especially Intel and Qualcomm, will also have the rights to commercialize the processor and memory architectures they invent to create a HIVE.
The graph analytics processor is needed, according to DARPA, for Big Data problems, which typically involve many-to-many rather than many-to-one or one-to-one relationships for which today's processors are optimized. A military example, according to DARPA, might be the the first digital missives of a cyberattack. A civilian example, according to Intel, might be all the people buying from Amazon mapped to all the items each of them bought (clearly delineating the many-to-many relationships as people-to-products).
"From my standpoint, the next big problem to solve is Big Data, that today is analyzed by regression which is inefficient for relations between data points that are very sparse," said Tran. "We found that the CPU and GPU leave a big gap between the size of problems and the richness of results, whereas graph theory is a perfect fit for which we see an emerging commercial market too."
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